Using Internal D Flip-Flops in FPGA as Alternative Memory

dc.contributor.author Bilge Deniz Maden
dc.contributor.author Mustafa Gündüzalp
dc.contributor.author Gunduzalp, Mustafa
dc.contributor.author Maden, Bilge Deniz
dc.date.accessioned 2025-10-06T17:49:36Z
dc.date.issued 2023
dc.description.abstract Field Programmable Gate Arrays (FPGAs) are used in various applications ranging from emulating older systems to modern complex digital systems by using the advantage of their very high speed and modularity. FPGAs utilize Block Random Access Memory (BRAM) and internal D flip-flops embedded within logic blocks as main memory. BRAM is used as general-purpose RAM whereas internal D flip-flops used as registers in many applications. In this study a system is designed to utilize internal D flip-flops as general-purpose RAM. Simulation and experimental results show that internal D flip-flops are being used as general-purpose RAM successfully by using designed control system that has some important key features. One of them is the combination of address bus and data bus which is achieved through storing address value within registers. The other one is stepping system. In this stepping system operations are realized through a rising edge of a single bit input. It takes three steps to complete a single operation. Read and write mode is selected through a bit which is controlled from outside of the FPGA device. Depending on mode bit the read or write operation is executed on second and third step. © 2023 Elsevier B.V. All rights reserved.
dc.description.sponsorship Aksaray University, IEEE Seccion Espana, University de La Laguna
dc.identifier.doi 10.1109/ICECCME57830.2023.10252754
dc.identifier.isbn 9798350322972
dc.identifier.scopus 2-s2.0-85174020758
dc.identifier.uri https://www.scopus.com/inward/record.uri?eid=2-s2.0-85174020758&doi=10.1109%2FICECCME57830.2023.10252754&partnerID=40&md5=3b6a7d85d038bc507f29d1dec9f5b863
dc.identifier.uri https://gcris.yasar.edu.tr/handle/123456789/8525
dc.identifier.uri https://doi.org/10.1109/ICECCME57830.2023.10252754
dc.language.iso English
dc.publisher Institute of Electrical and Electronics Engineers Inc.
dc.relation.ispartof 2023 International Conference on Electrical Computer Communications and Mechatronics Engineering ICECCME 2023
dc.rights info:eu-repo/semantics/closedAccess
dc.subject Clb, Flip-flop, Fpga, Lut, Ram, Field Programmable Gate Arrays (fpga), Random Access Storage, Clb, D Flip Flops, Digital System, Field Programmable Gate Array, Field Programmables, High Speed, In-field, Lut, Programmable Gate Array, Random Access Memory, Flip Flop Circuits
dc.subject Field programmable gate arrays (FPGA), Random access storage, CLB, D flip flops, Digital system, Field programmable gate array, Field programmables, High Speed, In-field, LUT, Programmable gate array, Random access memory, Flip flop circuits
dc.subject CLB
dc.subject LUT
dc.subject FPGA
dc.subject Flip-flop
dc.subject RAM
dc.title Using Internal D Flip-Flops in FPGA as Alternative Memory
dc.type Conference Object
dspace.entity.type Publication
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gdc.description.department
gdc.description.departmenttemp [Maden B.D.] Yaşar University, Faculty of Engineering, Department of Electrical and Electronics Engineering, Izmir, Turkey; [Gunduzalp M.] Yaşar University, Faculty of Engineering, Department of Electrical and Electronics Engineering, Izmir, Turkey
gdc.description.endpage 4
gdc.description.publicationcategory Konferans Öğesi - Uluslararası - Kurum Öğretim Elemanı
gdc.description.startpage 1
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gdc.virtual.author Gündüzalp, Mustafa
person.identifier.scopus-author-id Maden- Bilge Deniz (58645282700), Gündüzalp- Mustafa (6507230381)
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